# Ratioed Logic Circuits Inverter | Digital Electronics

Apart from the complementary CMOS inverter, there are other forms of MOS inverter that can be used to build logic gates. Figure 1(a): shows a generic nMOS inverter that uses either a resistive load or a constant current source.
For the resistor case, if we superimpose the resistor load line on the I-V characteristics of the pull-down transistor (Figure 1(b)), we can see that at o the output is some small V (Vo) Figure 1(c) e when v,-o, vo. rises to Voo. As the resistor is made larger, the Vo decreases and the current flowing when the inverter is turned on decreases.
Correspondingly, as the load r resistor is decreased in value, the να rises and the ON current: rises. Selection of the resistor value would seek a compromise between Vo the current drawn, and the pull-up delay that r increases with the value of the load resistor. Current sources al have high output resistance and thus offer sharper transitions.

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Neither high-value resistors nor ideal current sources are readily available in most CMOS processes. A more practical circuit called a pseudo-nMOS inverter is shown in figure 2 (a). It uses a pMOS transistor pull-up or load that has its gate permanently grounded to approximate a constant of the current source. Pseudo-nMOS circuits get their name from an early nMOS technology (which preceded CMOS technology as a major systems technology) in which only ut nMOS transistors were available; the grounded pMOS R transistor is reminiscent of a depletion mode nMOS transistor that is always ON.

The transfer characteristics may again be derived by finding Vo for which L for a given Vi, as shown in Q Figure 2 (b) and Figure 2 (c). The beta ratio affects the shape of the transfer characteristics and the Vou of the inverter Larger pMOS transistors offer faster rise times but less sharp transfer characteristics. Figure 2 (d) shows that when the nMOS transistor is turned on, a constant DC current flows in the circuit.